![]() Pulse-width-modulated control of a clocked circuit with adjustable power transmission
专利摘要:
Method and operating device for pulse-width-modulated control of a clocked circuit, in particular a power factor correction circuit (PFC circuit) The present invention relates generally to the improvement of the regulation and control of dimmable lamps at low load. The invention relates to an operating device (1) for illuminants, in particular a converter for at least one LED, comprising a control unit (14) which is designed to use a clocked circuit (20), such as a PFC circuit to trigger a pulsed signal (52): - which changes in a dimming range above a predetermined threshold value by the fact that the switch-on time ton of the pulses changes at a preferably fixed frequency of the pulses, and - which changes in a dimming range below a predetermined threshold value, that the switch-off time toff of the pulses increases gradually in the direction of low dimming values and the switch-on time ton continuously changes in the areas of constant switch-off time and the switch-on time ton increases step by step in the range of the steps of the switch-off time toff. 公开号:AT16546U1 申请号:TGM32/2015U 申请日:2015-02-02 公开日:2020-01-15 发明作者:Auer Hans 申请人:Tridonic Gmbh & Co Kg; IPC主号:
专利说明:
The invention relates to a method and an operating device for lamps for performing the method for pulse-width-modulated control of a clocked circuit, in particular a power factor correction circuit (PFC circuit) in use in control gear for lamps, so for example for direct or indirect control of an LED -Route. Pulse width modulated (PWM) controls are based on a type of modulation in which a technical variable (e.g. electrical voltage) changes between two values. The pulse duty factor (pulse duration to period duration) of a rectangular pulse is modulated at constant frequency, that is, the width of the pulse forming it. However, PWM controls are also known in which the frequency of the pulses can change. In the context of the present invention, this further definition of PWM is used. A pure pulse width modulated signal is generated, for example, by comparing a linearly increasing or decreasing signal (triangular or sawtooth voltage) with the analog input signal, which is a short or a long time above this depending on its value. At the intersections, the output signal is switched between two logic levels. Like a digital signal, it has the advantage that it can only assume - here: two - discrete values, but its pulse duty factor is infinitely variable. Thus, when operating a dimmable lighting by a dimming value or other load specification a lower light output is specified, the pulse duty factor of the pulse width modulation (hereinafter referred to as PWM modulation or PWM control) is preferably reduced at a constant frequency according to the prior art , until a predetermined minimum value is reached for the time at which the first logic level has been reached. This time is referred to below as the on time, since typically the (load) switch (for example an FET) of a clocked circuit (for example a PFC circuit) has been switched on until this time. The minimum value for ton alone cannot be undershot, since this is determined by physical boundary conditions (e.g. by the resolution and control limits of the assigned control circuit and by the time constants of AD converters, etc.). If, after reaching the minimum value of the t on time, a further load reduction is to be achieved, this is done according to the current state of the art in that the remaining time of the period, that is until the beginning of the subsequent pulse, is extended. In the following, this time is called t ofr time since the (load) switch is switched off by this point in time. Extending the t off time results in an increase in the so-called K factor, which indicates the ratio of the “non-current flow time divided by“ current flow time. In PFC circuit technology (Power Factor Correction, PFC), the current flow time is the time in which current flows through the input-side inductance (charging and discharging current I L ). The non-current flow time is the time during which no current flows. [0007] has While the PWM control in a high load to handle only a t on -ZeitRegelung needs in a low-load, the t on -time control on the t on - are frozen minimum value and on a scheme by changing the switch-off time t off can be changed. The latter places very high demands on the circuit technology and can not be accomplished without constantly recurring errors in the operating sequence. The invention is therefore based on the object of a method and an operating device for pulse-width-modulated control of a clocked circuit, in particular a power 1.15 AT 16 546 U1 2020-01-15 Austrian patent office to specify factor correction circuit (PFC circuit), which enables problem-free and trouble-free dimming in the range of low or very low load of any lighting path. [0009] This object is achieved according to the present invention by the features of the independent claims. The central idea of the invention is developed in a particularly advantageous manner by the dependent claims. According to the invention, an operating device for lamps is claimed, in particular a converter for at least one LED, which has a control unit which is designed to control a clocked circuit, such as a PFC circuit, by means of a pulsed signal. According to the invention, the signal changes in a dimming range above a predefined threshold value by the fact that the switch-on time t on of the pulses changes at a preferably fixed frequency of the pulses, and in a dimming range below a predefined threshold value by the switch-off period t off in the direction of lower dimming values of the pulses gradually increased and in the areas of constant switch-off time the on period t on changes continuously and in the region of the jumps of the stages of the turn-off time t O the on period Ton ff jump increased. Alternatively, an operating device for lamps is claimed, in particular a converter for at least one LED, which has a control unit which is designed to control dimmable operation of the lamps, the control unit being designed to output a pulsed signal. This signal changes in a dimming range above a predetermined threshold value in that the switch-on time t on of the pulses is changed at a preferably fixed frequency of the pulses. Furthermore, the signal changes in a dimming range below a predetermined threshold value in that, in the direction of low dimming values, the switch-off time period t off of the pulses is at least partially continuously increased and the switch-on time period t on is continuously reduced. The control unit of such an operating device can have a PWM modulator according to the invention, to which a preset signal for the switch-off time t off of the pulses is supplied by a controller, the PWM modulator regulating the switch-on time t on depending on a feedback signal that is a parameter of the operation the lamp directly or indirectly. [0013] According to the invention, the controller of such an operating device has an interface for receiving a dimming signal. Furthermore, a method is claimed according to the invention for operating a PFC circuit for operating lamps, in particular at least one LED, the switch of the PFC circuit being clocked by a signal. This method is characterized in that the signal changes in a dimming range above a predetermined threshold value in that the switch-on time to n of the pulses changes with a preferably fixed frequency of the pulses. Furthermore, the clocked signal can change in a dimming range below a predetermined threshold in that the switch-off time t off of the pulses increases gradually in the direction of low dimming values, in the areas of constant switch-off time the switch-on time t on changes continuously and in the range of the jumps in the stages of the switch-off time period t off the switch-on time period t on increases step by step. Further advantages, features and properties of the present invention are explained in more detail below with reference to exemplary embodiments with reference to the accompanying drawings. 1 shows a lighting system with an actively clocked power factor correction circuit (PFC) according to a possible embodiment, [0018] FIG. 2 shows a circuit diagram of an actively clocked power factor correction circuit according to a possible embodiment, 2.15 AT 16 546 U1 2020-01-15 Austrian patent office FIG. 3 2 shows currents and voltages to explain the mode of operation of the actively clocked power factor correction circuit according to the exemplary embodiment from FIG. 2 in a possible operating mode, FIG. 4 shows the principle of the simplest embodiment of a feedback-based PFC circuit according to the prior art, FIG. 5 shows the principle of a K-factor based feedback of a PFC circuit according to the prior art, FIG. 6 shows the pulse profile of a K-factor-based PFC circuit according to the prior art, FIG. 7 shows the dependence of t on or the K factor on the load in a PFC circuit according to the prior art, FIG. 8 shows the principle of an external K-factor-based feedback of a PFC circuit according to the invention, FIG. 9 shows the dependence of t on or the K factor on the load in a PFC circuit according to the present invention. An area of application of the invention is operating devices with power factor correction. Power factor correction (PFC) is used to eliminate or at least reduce harmonic currents in an input current. Harmonic currents can occur in particular in the case of non-linear consumers, such as, for example, rectifiers with subsequent smoothing in power supply units, since the phase of the input current in such consumers is shifted despite the sinusoidal input voltage and is non-sinusoidally distorted. The higher-frequency harmonics that occur can be counteracted by an active or clocked power factor correction circuit connected upstream of the respective device. For power factor correction circuits, a circuit topology is often used, which is based on a boost converter also referred to as a step-up converter or step-up converter. An inductor or coil supplied with a rectified AC voltage is charged or discharged with an input current by switching a controllable switch on / off. The discharge current of the inductance flows via a diode to the output of the converter coupled to an output capacitance, so that a DC voltage that is higher than the input voltage can be tapped at the output. Other types of converters can also be used. Power factor correction circuits can be operated in various operating modes. In particular, operation with a continuous current through the aforementioned inductance (so-called Continuous Conducton Mode. CCM), operation with a discontinuous inductance or coil current (Discontinuous Conduction Mode, DCM) or operation in the border area between continuous and discontinuous current the inductance (Borderline Conduction Mode or Boundary Conduction Mode, BCM) is known. In BCM operation, a drop in the coil current to zero during the discharge phase of the coil can be used as an occasion to start a new switching cycle and to switch the switch on again in order to recharge the coil. The power factor correction circuit can be controlled or regulated over the duration of the time during which the switch is in each case switched on. In DCM mode, on the other hand, after a zero crossing of the coil current during the discharge phase, a predetermined additional waiting time will first be waited until the switch is closed again. [0028] DE 10 2004 025 597 A1 describes a power factor correction circuit in which an output DC voltage is derived during the switch-off period. When operating a power factor correction circuit in DCM mode, the waiting time before switching the converter on again can be dependent on a load, i. abhän3 / 15 AT 16 546 U1 2020-01-15 Austrian patent office gig from an output power of the power factor correction circuit, can be selected to maintain a predetermined bus voltage. If the switch is switched on again immediately after this time, this can lead to irregularities in the coil current. If the switch-on time is selected only as a function of the specified waiting time and independently of the behavior of the power factor correction circuit, increased dissipation and thus heating of the switching means can also occur. The task is to specify methods and devices that offer improvements with regard to the problems mentioned. The task is to specify methods and devices for power factor correction in which operation over a larger range of loads is possible. It is also an object to specify methods and devices in which the dynamic behavior of the power factor correction circuit during the period in which the switch is in the off state can be taken into account when determining the switch-on time. In methods and devices according to embodiments, a power factor correction circuit for a lamp can be operated in several operating modes. Depending on a load that can be detected via the output power, for example, an operating mode can be selected from a plurality of operating modes. In a first operating mode, which can be a DCM operating mode, a minimum waiting time between switching off the switching means and switching the switching means on again is determined. A switch-on time for the switching means is not only determined as a function of the minimum waiting time, but also as a function of a voltage drop across the switching means. This allows the dynamic behavior of the power factor correction circuit to be taken into account during the off state of the switching means in order to determine the switch-on time. In the case of a power factor correction circuit according to one exemplary embodiment, a control device is designed to carry out the corresponding method. The switching means can be a circuit breaker, in particular an FET or MOSFET, and the voltage dropping across the switching means can be the drain-source voltage of the circuit breaker while the circuit breaker is switched to the off state. The control device of the power factor correction circuit can determine the switch-on time depending on the time-dependent behavior of the voltage drop across the drain-source path of the circuit breaker. The control device of the power factor correction circuit can define time windows which correspond to the permissible switch-on times and which each lie at the times at which the voltage drop across the drain-source path of the circuit breaker approaches a local minimum or passes through it. This means that the switch is only switched on if not only the minimum waiting time has expired, but the voltage on the switching device is in a valley. Such a procedure is also known as valley switching. The control device of the power factor correction circuit can receive information about the voltage at the drain-source path of the switching means or its change in various ways. In one configuration, the current flowing through the inductance of the power factor correction circuit can be detected and the point in time at which the voltage on the drain-source path of the switching means has an extremum can be determined depending on a comparison of the current through the coil with a reference value. The control device can be supplied with a corresponding measurement signal which indicates the current in the coil or its zero crossings. The measurement signal can be generated in such a way that it indicates zero crossings of the coil current and their direction. A local minimum or valley of the voltage on the switching means can be detected depending on a zero crossing of the coil current in a certain direction. To detect the zero crossing of the current, a corresponding detection circuit can be provided, with which, for example, a winding of the coil current is detected and compared with a reference value. The control device of the power factor correction circuit can make a transition between the first operating mode and a second operating mode depending on the load or output power of the power factor correction circuit. The second operating mo 4.15 AT 16 546 U1 2020-01-15 austrian patent office dus can be a CCM or BCM company. In the second operating mode, the power factor correction circuit can be controlled or regulated by setting the on time during which the switching means is switched on. In the first operating mode, the power factor correction circuit can be controlled or regulated by setting the minimum waiting time. In the first operating mode, the on-time during which the switching means is switched on can be selected to be the same value that corresponds to the minimum value of the on-times permissible in the second operating mode. The minimum waiting time can only be defined and used in the first operating mode for controlling the power factor correction circuit. If the control device of the power factor correction circuit detects that the load or output power falls below a threshold value, the control device can automatically switch from the second operating mode to the first operating mode. The power factor correction circuit according to embodiments can be used in particular for power factor correction for an AC / DC converter, so that in this case the input voltage is a rectified AC voltage and the output voltage is a DC voltage. The power factor correction circuit according to exemplary embodiments can be constructed in accordance with the topology of a boost converter, so that the discharge current of the inductance is fed via a diode to the output connection coupled to an output capacitance. The methods and configurations described can also be applied to other converter topologies. In each of the exemplary embodiments, a switch-on time can be selected in the first operating mode, for example in the DCM operating mode, in such a way that the following three conditions are met cumulatively: the minimum waiting time has expired; the current through the inductance is at a zero crossing; and the drain-source voltage of the switching means has dropped to a local minimum. The control device can be designed in the form of an integrated circuit, in particular an application-specific special circuit (ASIC, Application Specific Integrated Circuit). The control device can have a common measurement input for detecting a measured variable corresponding to the coil current or a zero crossing of this current, which is also used to determine the time windows which correspond to a local minimum or the voltage drop across the switching means. The method and power factor correction circuit can be used in an operating device for a lamp, for example for an electronic ballast for fluorescent lamps or for an LED converter. In this application, exemplary embodiments of the invention make it possible to adapt over a wide range of different power levels or components of the operating device used in each case and in this way to achieve energy-efficient switching even in a DCM operating mode. [0039] FIG. 1 shows a block diagram representation of a lighting system 1 which has an operating device 2 and an illuminant 3 operated by the latter, for example one or more LEDs or OLEDs. The operating device 2 can be connected to a bus 4 or a wireless communication system in order to receive dimming commands and / or to output status messages. The operating device 2 can be configured, for example, as an electronic ballast (EVG) for a gas discharge lamp, fluorescent lamp or another fluorescent lamp or as an LED converter. The operating device 2 has a rectifier 10 for rectifying a supply voltage, for example the mains voltage. The operating device 2 has a circuit 1 for power factor correction with an associated control device 14. The power factor correction circuit provides an output voltage for downstream components of the operating device 2, which is also referred to as the bus voltage Vbus. A further voltage conversion and / or dimming functions can, for example, via a DC / DC converter 12, which can be designed as an LLC resonance converter, and / or 5.15 AT 16 546 U1 2020-01-15 Austrian patent office an output driver 13 can be achieved. The operation of the power factor correction circuit and its control device 14 is described with reference to FIG. 2 and 3 described in more detail. In general, the control device 14 can control the power factor correction circuit in a plurality of operating modes, which comprise at least one DCM (discontinuous conduction mode) operating mode as the first operating mode and a second operating mode. The second operating mode can be selected from a CCM (Continuous Conduction Mode) operating mode and a BCM (Borderline Conduction Mode or Boundary Conduction Mode) operating mode. In the first operating mode, an adaptation to different loads or different output power can be achieved by setting a minimum waiting time that must elapse between switching off a switching device and switching it on again. The control device 14 controls the switching means such that not only the expiry of the minimum waiting time is included in the criterion for switching on the switching means, but also the time-dependent behavior of the power factor correction circuit is taken into account. The switching means can be switched on again depending on whether the minimum waiting time has expired and whether a drain-source voltage of the switching means fulfills a specific criterion. The criterion can include that the drain-source voltage of the switching means reaches a local minimum value as a function of time. This criterion can be checked by supplying the control device 14 with a quantity which contains information about zero crossings of the current in a coil of the power factor correction circuit. [0044] FIG. 2 is a circuit diagram of the power factor correction circuit 20 according to an embodiment. An alternating supply voltage, for example the mains voltage, is converted by a rectifier (not shown in FIG. 2) into a rectified alternating voltage which is present as an alternating input voltage Vin between an input terminal of the power factor correction circuit 20 and ground. The input AC voltage Vin is fed to an inductor or coil 21. The inductance 21 is connected in series with a diode 22 between the input connection and an output connection 27 of the power factor correction circuit 20. An output DC voltage Vout is provided at the output terminal 27 coupled to a charging capacitor 23. A further capacitor 25 can be connected between the inductance 21 and ground, which is connected in parallel with a series circuit comprising the switch 24 and the resistor 26. The capacitor 25 can be connected to the same connection of the diode 22 to which the inductance 21 is also connected. The DC output voltage Vout is used to supply a load, which is connected upstream of the power factor correction circuit 20. The load can be, for example, components of an operating device for a lamp, such as a fluorescent lamp, a halogen lamp, a light-emitting diode arrangement, etc. The load can include an LLC resonance converter with potential isolation. A controllable electronic switch 24 is connected to the connection between the inductor 21 and the diode 22, which is a power switch and which can be designed, for example, as a field effect transistor (FET), in particular as a MOSFET. The switch 24 can be connected to ground via a resistor 26, wherein the resistor 26 can serve as a shunt resistor. The switch 24 is switched by the control device 14 of the power factor correction circuit 20 by means of a pulsed signal into the on state and the off state. The control device 14 has a corresponding output 41 for controlling a control signal with which, for example, the gate voltage of the switch 24 can be controlled directly or indirectly (for example via a driver circuit). In the switched-on state of the switch 24, the inductor 21 is connected to ground via the switch 24, the diode 8 blocking, so that the inductor 21 is charged and energy is stored in the inductor 21. On the other hand, if switch 24 is turned off, i.e. open, the diode 22 is conductive, so that the inductance 21 through the diode 22 in the drawer 6.15 AT 16 546 U1 2020-01-15 Austrian patent office Capacitor 23 can discharge and the energy stored in the inductor 21 is transferred to the charging capacitor 23. The switch 24 is controlled by a control device 14, which can be designed in the form of an integrated circuit, in particular as an ASIC. The power factor correction is achieved by repeatedly switching the switch 24 on and off, the switching frequency for the switch 24 being much greater than the frequency of the rectified input AC voltage Vin. The power factor correction circuit 20 can operate as a boost converter. The control device 14 can be supplied with various measured variables which can be evaluated for controlling or regulating the power factor correction circuit 20 or other components of the operating device. For example, the control device 14 can detect the output voltage via a voltage divider with resistors 36, 37. The control device 14 can also be supplied with a measured variable which indicates when a current I L in the inductor 21 has a zero crossing or with which sign the zero crossing takes place. The corresponding detection circuit can have a winding 31 or a small coil 31, which is inductively coupled to the inductor 21. The winding 31 is connected via a diode 32 and a resistor 33 to a node, which is connected via a further resistor 34 to a node between the switch 24 and the resistor 26. The signal at the input 42 of the control device 14 indicates zero crossings of the current I L in the inductor 21, in particular in the time periods in which the switch 24 is switched to the off state. The control device 14 generates the pulsed control signal in order to cyclically switch the switch 24 to the on state (conductive state) or the off state (nonconductive state). This can be done in different ways, in particular depending on a load or output power. With higher loads or output powers, a second operating mode is used, which can be a BCM operation or CCM operation. The length of time during which the switch 24 is switched on can be set in order to keep the output voltage at a desired value. The time period during which the switch 24 is switched on can be selected as a function of a load or output power at the output 27. As long as the load or output power is greater than a threshold value, the operation can be adapted by reducing the on-time, ie the time period during which the switch 24 is switched on. When the load or output power reaches the threshold, a first operating mode can be activated, which is a DCM operation. After the switch 24 is switched to the off state, the switch 24 is not immediately switched on again when the current I L in the inductor 21 has dropped to zero, but a certain minimum waiting time is provided. The on time can be kept in DCM mode at a predetermined fixed value, which can be the smallest value that can be selected for the on time in BCM mode. An adaptation to different loads or output powers can take place in the first operating mode, ie in DCM mode, by adapting the minimum waiting time. Incidentally, in the first operating mode, ie in DCM operation, a switch-on time for the switch is not only determined according to the minimum waiting time, but also depending on the time-dependent behavior of the current I L through the inductor 21 and depending on the time-dependent behavior of the Voltage that drops between the drain connection and the source connection of the switch 24. [0052] FIG. 3 illustrates the control of the power factor correction circuit 20 by the control device 14 in the second operating mode, which is shown as an example as a BCM operation. The switch is switched to the on state and the off state by the gate voltage Vg at the switch 24. When the switch is switched to the off state, the inductance 21 discharges and the coil current I L 51 decreases. In BCM operation, a new switch-on process can be triggered by the current I L 51 falling to zero at 54 or having a zero crossing. The switch 24 is then switched on again by the corresponding control signal 52 in order to reload the inductance 21. In BCM mode, the on time 7/15 AT 16 546 U1 2020-01-15 Austrian patent office can be adapted to keep the bus voltage stable for different loads and / or output powers. Also in FIG. 3 shows the voltage 53 which drops between the drain connection and the source connection of the switch 24 in BCM operation. While in FIG. 3 illustrates a BCM operation as an example, the second operating mode, which can be activated with larger loads and / or larger output powers, can also be a CCM operation. In CCM mode, the switch 24 can be switched on when the current I L through the inductance 21 reaches a non-zero reference value. [0053] FIG. 4 illustrates the principle of the simplest embodiment of a feedback-based PFC circuit according to the prior art. A controller compares the Vbus voltage with a reference value Ref and regulates the t on value by turning the switch 24 on and off so that the output voltage Vout ensures an almost constant dimming value (principle of PWM modulation). The PWM modulator thus delivers a clocked, correspondingly modulated signal. This type of dimming value control is robust for the range of high dimming values and is currently not questioned in the prior art. Problems arise - as already indicated in the introduction to the description - with low dimming value specifications, since for physical reasons the t on value cannot be chosen arbitrarily small. In order to nevertheless a correspondingly low dimming level - thus a correspondingly low output voltage Vout - to obtain, in the modulation signal, an electroless state is generated, the t by the K factor, the duration of the non-energized state t acti ve and the duty cycle of the switch 24 on is characterized by the following equation - see also FIG. 6: toff K '^ active on [0055] This problem is solved according to the current state of the art (see FIG. 7) in that from the minimum value for t on with decreasing load, the K factor is continuously increased (dashed line), that is, at frozen t on (horizontal solid line) at the desired low load the switch-off time t off is regulated, with the associated circuitry and control problems already mentioned in the introduction to the description. The invention solves these problems in such a way that at low load specifications (dimming value specifications) the t on time continues to be changed without falling below the minimum t on time. This is done in that the t on- time sawtooth is increased suddenly at least once, preferably several times, in the direction of lower load specification in order to then preferably decrease again continuously. This means that the minimum t on time specification can be adhered to and the t on time can be kept changeable over the entire load range. [0057] The minimum t on time specification is thus observed without freezing the t on time in the lower load range. [0058] The area of the saw-toothed shape of the t on -time is preferably carried out in a lower load range after (of the maximum load to the load coming lower) t on - time t for the first time, the minimum on -time has reached. In the area of the sawtooth-shaped course of the t on time, the k factor is increased again, which preferably takes the form of a step-wise (discrete) change in the K value. The increasing jump in the K value takes place synchronously with a jump with which the ton time is increased. In the areas of constant K value, the t on time is then preferably reduced continuously in the direction of lower load. [0061] Depending on a value input to reduced load is thus in accordance with the K-value specification for the PWM control increases figure 8 in steps so that so gradually extended t O ff times be set (feed forward). Thus, in the area of the K-value stages with a constant K-value, a continuously changing t on- time regulation can take place depending on the load specification in this area. 8.15 AT 16 546 U1 2020-01-15 Austrian Patent Office [0062] The K value can be externally specified for the control unit which outputs the pulsed signal with a variable t on time, but it can also be generated internally in this control unit. For example, using a look-up table using a determined (based on a returned measured value) or supplied load specification. According to FIG. 9, a dimming value specification is preferably fed to a (micro) controller pC, which then, depending on the dimming value specification, outputs a K value specification signal from the control unit, which outputs the pulsed signal with a variable t on time. Alternatively, the K value specification in the area of low loads cannot change step by step but also continuously. This has the advantage that, due to the second variable parameters (t on time and t off time or K value), the resulting changes are of course less drastic compared to the gradual freezing of the K value (K factor). It should be noted that the present invention is a PWM signal in a broader sense, since the frequency of the pulses (modulation frequency) can change at any time depending on the control system. However, according to the invention, the output signal in the form of a PWM signal with a varying frequency must in fact be used to drive the switch of a PFC circuit, which must be taken into account in the technical implementation of this regulation.
权利要求:
Claims (5) [1] Operating device (1) for illuminants, in particular converter for at least one LED, comprising a control unit (14) which is designed to operate a clocked circuit (20), such as a PFC circuit, by means of a pulsed signal (52) to be controlled, which is supplied directly or indirectly to a switch of the clocked circuit (20) as a control signal, the control unit being designed to generate the pulsed signal: - Which changes in a dimming range above a predetermined threshold value in that the switch-on time to n of the pulses changes at a preferably fixed frequency of the pulses, and - That changes in a dimming range below a predetermined threshold value in that the switch-off time t off of the pulses increases gradually in the direction of low dimming values and the switch-on time to n changes continuously in the areas of constant switch-off time and in the area of the jumps in the steps of the switch-off time t off the switch-on time t on increases suddenly. [2] 2. Operating device (1) for lamps, in particular converter for at least one LED, comprising a control unit (14) which is designed to control dimmable operation of the lamps, which is supplied directly or indirectly to a switch of the clocked circuit (20) as a control signal , the control unit being designed to generate the pulsed signal: - Which changes in a dimming range above a predetermined threshold value in that the switch-on time to n of the pulses changes at a preferably fixed frequency of the pulses (52), and - That changes in a dimming range below a predefined threshold value in that the switch-off time period t off of the pulses increases at least partially continuously in the direction of low dimming values and the switch-on time period t on is continuously reduced. [3] 3. Operating device (1) according to claim 1 or 2, wherein the control unit (14) has a PWM modulator, to which a predetermined signal (Ref) for the switch-off period t off of the pulses is supplied by a controller (pC), the PWM Modulator regulates the switch-on time t on depending on a feedback signal that directly or indirectly reproduces a parameter for the operation of the lamps. [4] 4. Operating device according to claim 3, wherein the controller (pC) has an interface for receiving a dimming signal. [5] 5. Method for operating a PFC circuit (20) for operating lamps, in particular at least one LED, the switch (24) of the PFC circuit (20) being clocked by a signal (52), - Which changes in a dimming range above a predetermined threshold value in that the switch-on time to n of the pulses changes at a preferably fixed frequency of the pulses, and - That changes in a dimming range below a predetermined threshold value in that the switch-off time t off of the pulses increases gradually in the direction of low dimming values and the switch-on time t on changes continuously in the areas of constant switch-off time and in the area of the jumps in the steps of the switch-off time t off the switch-on time t on increases suddenly.
类似技术:
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同族专利:
公开号 | 公开日 DE102014221554A1|2016-04-28|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题 DE102010031239A1|2010-03-19|2011-09-22|Tridonic Ag|LED control with clocked constant current source| US20130082621A1|2011-09-29|2013-04-04|Atmel Corporation|Primary side pfc driver with dimming capability| US20140139131A1|2012-11-20|2014-05-22|Samsung Electro-Mechanics Co., Ltd.|Light emitting diode driving apparatus| DE102004025597B4|2004-05-25|2014-08-21|Tridonic Gmbh & Co Kg|Power Factor Correction Method and Circuit | US8773031B2|2010-11-22|2014-07-08|Innosys, Inc.|Dimmable timer-based LED power supply| JP5884050B2|2011-12-05|2016-03-15|パナソニックIpマネジメント株式会社|Lighting device and lighting apparatus provided with the same| JP5942256B2|2012-06-08|2016-06-29|パナソニックIpマネジメント株式会社|Lighting device and lighting apparatus| JP6037161B2|2012-08-06|2016-11-30|パナソニックIpマネジメント株式会社|LIGHTING DEVICE, LIGHTING EQUIPMENT, LAMP, AND SOUND PREVENTION METHOD| DE102013216877A1|2013-08-23|2015-02-26|Osram Gmbh|Clocked electronic energy converter|EP3965275A1|2020-09-08|2022-03-09|Tridonic GmbH & Co. KG|Power factor correction circuit|
法律状态:
2021-10-15| MM01| Lapse because of not paying annual fees|Effective date: 20210228 |
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申请号 | 申请日 | 专利标题 DE102014221554.4A|DE102014221554A1|2014-10-23|2014-10-23|Pulse width modulated control of a clocked circuit with adjustable power transmission| 相关专利
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